Implementação de Classificadores Neuronais na Tecnologia de Processadores Digitais de Sinais

J. B. O. Souza Filho, J. M. Seixas
2016 Anais do 4. Congresso Brasileiro de Redes Neurais   unpublished
This article describes the implementation of an artificial neural network using high-speed digital signal processors (DSPs). The target processor was the ADSP-2106x, a 32 bit floating-point DSP, running Assembly language codes. As a case study, a particle discriminator for the field of high-energy physics is developed for online operation. Accuracy and speed tests confirm the good matching of this technology to the requirements of network implementation
doi:10.21528/cbrn1999-093 fatcat:6nhei3jf6naffi7iphpka7hrzq