An all-digital built-in self-test technique for transfer function characterization of RF PLLs

Ping-Ying Wang, Hsiu-Ming Chang, Kwang-Ting Cheng
2011 2011 Design, Automation & Test in Europe  
This paper presents an all-digital built-in selftest (BIST) technique for characterizing the error transfer function of RF PLLs. This BIST scheme, with on-chip stimulus synthesis and response analysis completely done in the digital domain, achieves high-accuracy characterization and is applicable to a wide range of PLL architectures. For the popular sigma-delta fractional-N RF PLLs, the added circuitry required for this BIST solution is all digital except a bang-bang phase-frequency detector
more » ... -PFD), which incurs an area of only 0.0001mm 2 for our implementation in a 65nm CMOS technology. The silicon characterization results at 3.6GHz reported by this BIST solution and by explicit measurement have a root-mean-square difference of 0.375dB only.
doi:10.1109/date.2011.5763063 dblp:conf/date/WangCC11 fatcat:xb6nl2yh3fhl3mtlmqmbuz5lpq