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Channel-Stacked NAND Flash Memory with High-κ Charge Trapping Layer for High Scalability
2019
2019 Electron Devices Technology and Manufacturing Conference (EDTM)
Exploding demands for mobile devices induce the drastic expansion of the market of NAND flash memory as high density storage devices. Threedimensional (3D) NAND flash memory paved a new way of increasing the memory capacity by stacking cells in three-dimension. For stacked NAND flash memory, the thickness of ONO (memory dielectric layers) will be a roadblock in scaling-down of the minimum feature size, while channel diameter can be scaled down to < 20 nm. It is challenging to reduce the
doi:10.1109/edtm.2019.8731328
fatcat:sc4eunm44bccffmfpzjfuplqea