In this paper, we present a probabilistic algorithm for analyzing cost/performance tradeoffs in interactive synthesis of DSP algorithms. Our approach is based on an analysis of data dependencies combined with a probabilistic scheduling technique in which operations are iteratively redistributed to minimize resource cost. Our algorithm may consider both memories with different access times and pipelined units with different numbers of stages. The output is a shape function illustrating the cost

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... s. performance tradeoff. We have tested this algorithm on several benchmarks including an FIR jilter, a linear recurrence solver, and a robot kinematics example. Results show that the average error in cost, as compared to manual designs, is 0.41 %, while the average error in performance is 4.90 % without memory access times and 0. 77 % with memory access times. The maximum cost (performance) error generated by our algorithm on our benchmarks is 5 % (22 %).