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Design of VLSI Digital Filters for Tolerating Transient Timing Errors
2013
Proceedings of the International Conference on Computer, Networks and Communication Engineering (ICCNCE 2013)
unpublished
As the feature size of chips shrinks with semiconductor technology advancing, the size of transistors and their operating voltage keep decreasing. One of the major problems with advanced semiconductor technology is timing errors caused by process variation and noises. With such problems, conventional worst-case designs suffer poor system performance. This paper proposes an aggressive design technique for VLSI digital filters for tolerating transient timing errors. When a timing error occurs,
doi:10.2991/iccnce.2013.164
fatcat:ccyiiiavkzatvcm34ze2hcdblq