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Single Low-Supply Current-mode CMOS Analog Multiplier Circuit
2006
2006 International Symposium on Communications and Information Technologies
A simple structure of low-voltage current-mode CMOS analog multiplier circuit is presented. This multiplier circuit is based-upon quarter square algebraic identity technique by using CMOS technology. The transistors are operated in saturation region for different sub-circuits. The electronic resistor circuits are used as the input stage. The differential amplifiers are used for biased the squaring circuits. The current-mode operation can be obtained with a single supply, low-voltage,
doi:10.1109/iscit.2006.339949
fatcat:537h2md3wzhmbixnevbdr7mqem