The J-machine multicomputer

Michael D. Noakes, Deborah A. Wallach, William J. Dally
1993 SIGARCH Computer Architecture News  
The MIT J-Machine multicomputer has been constructed to study the role of a set of primitive mechanisms in providing efficient support for parallel computing. Each J-Machine node consists of an integrated multicomputer component, the Message-Driven Processor (MDP), and 1 MByte of DRAM. The MDP provides mechanisms to support efficient communication, synchronization, and naming. A 512 node J-Machine is operational and is due to be expanded to 1024 nodes in March 1993. In this paper we discuss the
more » ... design of the J-Machine and evaluate the effectiveness of the mechanisms incorporated into the MDP. We measure the performance of the communication and synchronization mechanisms directly and investigate the behavior of four complete applications. and the behavior of parallel applications running on the J-Machine. We use these studies to critique the effectiveness of the mechanisms and reflect on the impact of these design decisions in developing programming systems for the J-Machine. We contrast the effectiveness of the J-Machine with comparable multicomputers and consider the impact of alternative mechanisms to further enhance efficiency. The J-Machine This section describes the architecture of the J-Machine and the hardware prototype on which the studies were performed. Architecture The instruction set of the MDP includes the usual arithmetic, data movement, and control instructions. The MDP is unique in providing special support for communication, synchronization, and naming. 224 08S4-7495/93 $3.0001993 IEEE
doi:10.1145/173682.165158 fatcat:bsgc3r27zjemdeac5tq3adeyxy