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Tradeoffs in transactional memory virtualization
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems - ASPLOS-XII
For transactional memory (TM) to achieve widespread acceptance, transactions should not be limited to the physical resources of any specific hardware implementation. TM systems should guarantee correct execution even when transactions exceed scheduling quanta, overflow the capacity of hardware caches and physical memory, or include more independent nesting levels than what is supported in hardware. Existing proposals for TM virtualization are either incomplete or rely on complex hardwaredoi:10.1145/1168857.1168903 dblp:conf/asplos/ChungMMSCCKO06 fatcat:jp3ukk6jkvdnhfturvixrecali