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For sensor applications, the bandwidth of interest is generally a few hertz. In this bandwidth, offset and 1/f noise are the dominant sources of error. Chopping technique is an efficient approach to decrease the 1/f noise and low-frequency offset of CMOS amplifiers; thus, in this paper, a proposed chopper circuit to tackle these problems is presented. The chopper circuit is designed using complementary CMOS switches that are optimized to achieve symmetric linear resistance in the range of inputdoi:10.21608/asat.2013.22277 fatcat:cyypsmd24vb4taruuguy44dkc4