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We present an approach for optimization of assertion placement in time-constrained HW/SW modules for detection of errors due to transient and intermittent faults. During the design phases, these assertions have to be inserted into the executable code and, hence, will always be executed with the corresponding code branches. As the result, they can significantly increase execution time of a module, in particular, contributing to a much longer execution of the worst case, and cause deadlinedoi:10.1109/ets.2011.35 dblp:conf/ets/IzosimovLPFPGF11 fatcat:p4w5y6fukrhidlnd7gdvlufuzy