Diastolic arrays: Throughput-driven reconfigurable computing

Myong Hyon Cho, Chih-Chi Cheng, Michel Kinsy, G. Edward Suh, Srinivas Devadas
2008 2008 IEEE/ACM International Conference on Computer-Aided Design  
In this thesis, we propose a new reconfigurable computer substrate: diastolic arrays. Diastolic arrays are arrays of processing elements that communicate exclusively through First-In First-Out (FIFO) queues, and provide hardware support to guarantee bandwidth and buffer space for all data transfers. FIFO control implies that a module idles if its input FIFOs are empty, and stalls if its output FIFOs are full. The timing of data transfers between processing elements in diastolic arrays is
more » ... re significantly more relaxed than in systolic arrays or pipelines. All specified data transfers are statically routed, and the routing problem to maximize average throughput can be optimally or near-optimally solved in polynomial time by formulating it as a maximum concurrent multicommodity flow problem and using linear programming. We show that the architecture of diastolic arrays enables efficient synthesis from high-level specifications of communicating finite state machines, providing a high-performance, off-the-shelf computer substrate that can be easily programmed.
doi:10.1109/iccad.2008.4681615 dblp:conf/iccad/ChoCKSD08 fatcat:bmtsgrtdora7vh5hgexbpii2wa