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Automated assumption generation for compositional verification
2008
Formal methods in system design
We describe a method for computing a minimum-state automaton to act as an intermediate assertion in assume-guarantee reasoning, using a sampling approach and a Boolean satisfiability solver. For a set of synthetic benchmarks intended to mimic common situations in hardware verification, this is shown to be significantly more effective than earlier approximate methods based on Angluin's L* algorithm. For many of these benchmarks, this method also outperforms BDD-based model checking and
doi:10.1007/s10703-008-0050-0
fatcat:sxzsoguegzbl5hyotojamgimpy