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Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors because of the size and complexity of the design and the complexity of the cache-coherence protocol. A controllable biased/constrained random stimuli generator coupled with an error detection mechanism using scoreboards and feedback with coverage analysis tools is a promising alternative methodology. We applied thisdoi:10.1109/aspdac.2002.995023 dblp:conf/vlsid/MukherjeeNM02 fatcat:jrl4y62ho5cnlogckqzv3g6cem