A New Hardware Design for Generating Digital Holographic Video based on Natural Scene
실사기반 디지털 홀로그래픽 비디오의 실시간 생성을 위한 하드웨어의 설계

Yoon-Hyuk Lee, Young-Ho Seo, Dong-Wook Kim
2012 Journal of the Institute of Electronics and Information Engineers  
In this paper we propose a hardware architecture of high-speed CGH (computer generated hologram) generation processor, which particularly reduces the number of memory access times to avoid the bottle-neck in the memory access operation. For this, we use three main schemes. The first is pixel-by-pixel calculation rather than light source-by-source calculation. The second is parallel calculation scheme extracted by modifying the previous recursive calculation scheme. The last one is a fully
more » ... ne is a fully pipelined calculation scheme and exactly structured timing scheduling by adjusting the hardware. The proposed hardware is structured to calculate a row of a CGH in parallel and each hologram pixel in a row is calculated independently. It consists of input interface, initial parameter calculator, hologram pixel calculators, line buffer, and memory controller. The implemented hardware to calculate a row of a 1,920×1,080 CGH in parallel uses 168,960 LUTs, 153,944 registers, and 19,212 DSP blocks in an Altera FPGA environment. It can stably operate at 198MHz. Because of the three schemes, the time to access the external memory is reduced to about 1/20,000 of the previous ones at the same calculation speed.
doi:10.5573/ieek.2012.49.11.086 fatcat:ync2fvsrgffhro53t25qwxkwka