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An efficient model for frequency-dependent on-chip inductance
2001
Proceedings of the 11th Great Lakes Symposium on VLSI - GLSVLSI '01
In this paper, we propose an efficient table-based model for frequency-dependent on-chip inductance, and apply it to compute mutual inductance between random wires and loop inductance for cascade wires, respectively. Our inductance computation achieves around 5% error when compared to the numerical solution, and matches frequency-dependent impact very well. We also apply the inductance model to generate RLC circuit models for on-chip interconnects, and present a complexityefficient normalized
doi:10.1145/368122.368887
dblp:conf/glvlsi/XuH01
fatcat:mynz2vx5wfdubmyciu7ykbf6ru