Limitations and challenges of computer-aided design technology for CMOS VLSI

R.E. Bryant, Kwang-Ting Cheng, A.B. Kahng, K. Keutzer, W. Maly, R. Newton, L. Pileggi, J.M. Rabaey, A. Sangiovanni-Vincentelli
2001 Proceedings of the IEEE  
As manufacturing technology moves toward fundamental limits of silicon CMOS processing, the ability to reap the full potential of available transistors and interconnect is increasingly important. Design technology (DT) is concerned with the automated or semiautomated conception, synthesis, verification, and eventual testing of microelectronic systems. While manufacturing technology faces fundamental limits inherent in physical laws or material properties, design technology faces fundamental
more » ... tations inherent in the computational intractability of design optimizations and in the broad and unknown range of potential applications within various design processes. In this paper, we explore limitations to how design technology can enable the implementation of single-chip microelectronic systems that take full advantage of manufacturing technology with respect to such criteria as layout density, performance, and power dissipation. One limitation is that the integrated circuit (IC) design process-like any other design process-involves practical tradeoffs among multiple objectives. For example, there is a need to design correct and testable chips in a very short time frame and for these chips to meet a competitive requirement. A second limitation is that the effectiveness of the design process is determined by its context-the design methodologies and flows we employ, and the designs that we essay-perhaps more than by its component tools and
doi:10.1109/5.915378 fatcat:jocv62sorfbnjp53u7b76j4mdi