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On-Chip Stimulus Generator for Gain, Linearity, and Blocking Profile Test of Wideband RF Front Ends
2010
IEEE Transactions on Instrumentation and Measurement
This paper presents the design and measurement of a stimulus generator suitable for on-chip RF test aimed at gain, 1-dB compression point (CP), and the blocking profile measurement. Implemented in a 90-nm complementary metal-oxide-semiconductor (CMOS), the generator consists of two low-noise voltage-controlled ring oscillators (VCOs) and an adder. It can generate a single-or two-tone signal in a range of 0.9-5.6 GHz with a tone spacing of 3 MHz to 4.5 GHz and adjustable output power. The VCOs
doi:10.1109/tim.2009.2036454
fatcat:4eujhiao5nhibkzpw4jpd4uk24