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Deep Neural Networks are becoming the de-facto standard models for image understanding, and more generally for computer vision tasks. As they involve highly parallelizable computations, CNN are well suited to current fine grain programmable logic devices. Thus, multiple CNN accelerators have been successfully implemented on FPGAs. Unfortunately, FPGA resources such as logic elements or DSP units remain limited. This work presents a holistic method relying on approximate computing and designdoi:10.1145/2967413.2967430 dblp:conf/icdsc/AbdelouahabBPBQ16 fatcat:qguj7rqa55de5gb7t4hwwmuipm