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An asymptotically constant, linearly bounded methodology for the statistical simulation of analog circuits including component mismatch effects
2000
Proceedings of the 37th conference on Design automation - DAC '00
This paper presents a new statistical methodology to simulate the effect of both inter-die and intra-die variation on the electrical performance of analog integrated circuits. The main feature of this methodology is that it accounts for device mismatch by using a number of variables that is asymptotically constant in the limit of perfectly matching devices, and is typically close to the number of independent process factors normally used to account for inter-die process variations only. A
doi:10.1145/337292.337302
dblp:conf/dac/GaurdianiSMSC00
fatcat:iiacc5jjcjdjtau6efvnvep4mi