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Register allocation with instruction scheduling for VLIW-architectures
2010
Programming and computer software
Interaction between the phases of register allocation and instruction scheduling are often consid ered in publications devoted to optimizations for the final stage of compilation. Typically, it is proposed to adapt one of the phase for needs of another without their combination into a single unit. However, their inte gration can essentially reduce the time of operation and enhance the performance of the resulting code. This study describes an attempt to combine these phases as completely as
doi:10.1134/s0361768810060058
fatcat:qldzypnqozf4dhrgnkkp3du7aq