BADGR: A practical GHR implementation for TAGE branch predictors

David J. Schlais, Mikko H. Lipasti
2016 2016 IEEE 34th International Conference on Computer Design (ICCD)  
In this work, we explore global history register (GHR) implementations for Tagged Geometric length (TAGE) style branch predictors with speculative updates. We break down the requirements to both update and recover TAGE predictors' history registers during normal operation and after mispeculation, discussing where various designs exhibit large checkpoint and/or operation overheads. To reduce these inefficiencies, we introduce BADGR, a novel GHR design for TAGE predictors that lowers power
more » ... tion and chip area over naive checkpointing techniques by 90% and 85%, respectively. 536 978-1-5090-5142-7/16/$31.00 c 2016 IEEE
doi:10.1109/iccd.2016.7753338 dblp:conf/iccd/SchlaisL16 fatcat:f346la4fjrexlhopdhkfivvx7y