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EmuNoC: Hybrid Emulation for Fast and Flexible Network-on-Chip Prototyping on FPGAs
[article]
2022
arXiv
pre-print
Networks-on-Chips (NoCs) recently became widely used, from multi-core CPUs to edge-AI accelerators. Emulation on FPGAs promises to accelerate their RTL modeling compared to slow simulations. However, realistic test stimuli are challenging to generate in hardware for diverse applications. In other words, both a fast and flexible design framework is required. The most promising solution is hybrid emulation, in which parts of the design are simulated in software, and the other parts are emulated
arXiv:2206.11613v1
fatcat:wxakooegcjekrb3lpbiylihowy