A low complexity dual-mode pulse-triggered FF design for wireless baseband processing is presented in this paper. It supports both single-edge- and double-edge-triggered operations subject to a mode select control. Due to the novelty in pulse generator design, the layout area overhead is only 8% when compared with other single-mode counterpart design. Postlayout simulations in TSMC 1P6M 0.18 μm CMOS process model also indicate that the proposed design is as efficient as its single-mode counterpart in various performance metrics.