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Symmetry within the sequence-pair representation in the context of placement for analog design
2000
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
This paper addresses the problem of device-level placement for analog layout, focusing mainly on symmetry-related aspects. Different from most of the existent analog placement approaches, employing basically simulated annealing optimization algorithms operating on flat (absolute) spatial representations [4], our model uses a more recent topological representation called sequence-pair [14], which has the advantage of not being restricted to slicing floorplan topologies. In this paper, we are
doi:10.1109/43.851988
fatcat:ugifujuoqfhavj7avzttnwhlaq