For realtime pattern classification applications (e.g. realtime image segmentation), the number of usable pattern classification algorithms is limited by the feasibility of high-speed hardware implementation. This paper describes a pattern classifier and associated hardware architecture and training algorithms. The classifier has both a feasible hardware implementation and other desirable properties not normally found in statistical classifiers. In addition to the classification/training

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... hms and hardware architecture, the paper discusses the application of the technique to the problem of image segmentation. Results from segmenting images are included. The scheme described has two major aspects: (1) The classifier itself, which is a look-up-table (LUT) implemented as a 2"-tree, which is a hierarchical data structure that corresponds to a recursive decomposition of feature space and (2) Training schemes, specific to the 2" structure, by which the classification tree is constructed. These training schemes may be used as techniques for machine learning. Two of the training algorithms have the following important properties: they are non-parametric and therefore independent of any particular probability model (e.g. Gaussian); they can handle any shaped decision regions in feature space; and They are consistent in the sense that for large training data sets they produce a classifier that approaches the ideal Bayes classifier. These attributes make this architecture/algorithm combination an excellent alternative to artificial neural networks, a class of classifiers in which there has been much interest, of late. The training algorithms also include an interesting application of the Minimum Description Length principle (MDL). It is used in a tree pruning algorithm that produces trees that are both significantly smaller and, at the same time, have better classification performance (i.e. lower error rates) than unpruned trees.