Mediaworm: a qos capable router architecture for clusters

Ki Hwan Yum, Eun Jung Kim, C.R. Das, A.S. Vaidya
2002 IEEE Transactions on Parallel and Distributed Systems  
With the increasing use of clusters in real-time applications, it has become essential to design high performance networks with Quality-of-Service QoS guarantees. In this paper, we explore the feasibility o f p r o viding QoS in wormhole switched routers, which are widely used in designing scalable, high performance cluster interconnects. In particular, we are interested in supporting multimedia video streams with CBR and VBR tra c, in addition to the conventional beste ort tra c. The proposed
more » ... ediaWorm router uses a rate-based bandwidth allocation mechanism, called Fine-Grained VirtualClock FGVC, to schedule network resources for di erent tra c classes. Our simulation results on an 8-port router indicate that it is possible to provide jitter-free delivery to VBR CBR tra c up to an input load of 70-80 of link bandwidth, and the presence of best-e ort tra c has no adverse e ect on real-time tra c. Although the MediaWorm router shows a slightly lower performance than a pipelined circuit switched PCS router, commercial success of wormhole switching, coupled with simpler and cheaper design, makes it an attractive alternative. Simulation of a 2 2 fat-mesh using this router shows performance comparable to that of a single switch, and suggests that clusters designed with appropriate bandwidth balance between links can provide required performance for di erent t ypes of tra c. Keywords Cluster Network, Quality-of-Service, Rate-based Scheduling, Router Architecture, VirtualClock, Wormhole Router I. Introduction C LUSTER systems are becoming a predominant and cost-e ective s t yle for designing high performance computers. Such systems are being used in as diverse applications as scienti c computing, web servers, multimedia servers, and collaborative e n vironments. These applications place di erent demands on the underlying cluster interconnect, making it imperative to reevaluate and possibly redesign the existing communication architecture. Multiprocessor network research 1 has primarily focussed on designing scalable, high performance networks low latency and high bandwidth to accommodate traditional best-e ort BE tra c. Over the years, network design philosophy has converged towards direct network topology, w ormhole switching, and virtual channel VC ow control 2 to meet these design goals. These research ideas have manifested in many commercial switch router designs 3 , 4 , 5 , 6 , 7 , 8 and have migrated to, and been successfully assimilated in, cluster interconnects 9 ,
doi:10.1109/tpds.2002.1158264 fatcat:g6pp45mqnzhzvptooaploqu6iu