Low-Transition Test Pattern Generation for BIST-Based Applications

Mehrdad Nourani, Mohammad Tehranipoor, Nisar Ahmed
2008 IEEE transactions on computers  
A low-transition test pattern generator, called the low-transition linear feedback shift register (LT-LFSR), is proposed to reduce the average and peak power of a circuit during test by reducing the transitions among patterns. Transitions are reduced in two dimensions: 1) between consecutive patterns (fed to a combinational only circuit) and 2) between consecutive bits (sent to a scan chain in a sequential circuit). LT-LFSR is independent of circuit under test and flexible to be used in both
more » ... T and scan-based BIST architectures. The proposed architecture increases the correlation among the patterns generated by LT-LFSR with negligible impact on test length. The experimental results for the ISCAS'85 and '89 benchmarks confirm up to 77 percent and 49 percent reduction in average and peak power, respectively.
doi:10.1109/tc.2007.70794 fatcat:tm5pgeck6namtjn7uuvxxjcsfm