Three-dimensional (3D) integrated circuits (IC) impose several challenges in thermal management. Stacking vertical layers significantly increases the heat dissipation per unit volume and the thermal footprint per unit area. The internal layers in the stacks are susceptible to high thermal gradients due to the low thermal conductivity interfaces and the distance from the heat sink. Several factors affect the thermal behavior of the 3D IC, including the through silicon vias, bonding, and cooling

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... echanisms. In this paper, we provide a detailed review of existing cooling mechanisms and their applicability to 3D ICs. We also propose two parameters to account for the thermal interactions among the devices and stack layers for incorporation in the 3D IC cooling system design: Thermal Intensification Factor (TIF) accounts for the increased heat flux due to multiple ICs along the heat transfer path, and Thermal Derating Factor (TDF) accounts for the increased thermal resistance introduced by the multiple layers. Also, a new flow passage design with variable fin density is presented to reduce the surface temperature non-uniformity along the coolant flow length.