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Joint hardware–software leakage minimization approach for the register file of VLIW embedded architectures
2008
Integration
New applications demand very high processing power when run on embedded systems. Very Long Instruction Word (VLIW) architectures have emerged as a promising alternative to provide such processing capabilities under the given energy budget. However, in this new VLIW-based architectures, the register file is a very critical contributor to the overall power consumption and new approaches have to be proposed to reduce its power while preserving system performance. In this paper, we propose a novel
doi:10.1016/j.vlsi.2007.04.004
fatcat:d2jy3al5rvh5tmmquuibqx2v44