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Analog/RF design techniques for high performance nanoelectronic on-chip interconnects
2008
2008 9th International Conference on Solid-State and Integrated-Circuit Technology
On-chip interconnects form the bottleneck of VLSI system performance. As technology progresses, VLSI on-chip interconnects encounter increasingly significant challenges, such as (1) signal attenuation and (2) crosstalk coupling. This paper proposes two analog/RF design techniques for high performance nanoelectronic on-chip interconnects: (1) application of distributed amplifiers for signal attenuation compensation by reducing interconnect effective resistance, and (2) application of bandpass
doi:10.1109/icsict.2008.4734936
fatcat:ajttmkbenjf6jm6rct5p2mqqum