Beyond the conventional transistor

H.-S. P. Wong
<span title="">2002</span> <i title="IBM"> <a target="_blank" rel="noopener" href="" style="color: black;">IBM Journal of Research and Development</a> </i> &nbsp;
This paper focuses on approaches to continuing CMOS scaling by introducing new device structures and new materials. Starting from an analysis of the sources of improvements in device performance, we present technology options for achieving these performance enhancements. These options include high-dielectric-constant (high-k) gate dielectric, metal gate electrode, double-gate FET, and strained-silicon FET. Nanotechnology is examined in the context of continuing the progress in electronic
more &raquo; ... enabled by silicon microelectronics technology. The carbon nanotube field-effect transistor is examined as an example of the evaluation process required to identify suitable nanotechnologies for such purposes.
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="">doi:10.1147/rd.462.0133</a> <a target="_blank" rel="external noopener" href="">fatcat:zwt2evpshjejlg7ulv5kvpl5za</a> </span>
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