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With advances in VLSI technology, microprocessor designers can provide more microarchitectural parallelism to increase performance. We have identified four major forms of such parallelism: multiple microoperations issued per cycle, multiple result distribution buses, multiple execution units, and pipelined execution units. The experiments reported in this paper address two important issues: the effects of these forms and the appropriate balance among them. A cenfrul microarchitecture isdoi:10.1145/633625.52406 fatcat:tlg7u7micvgohpktjmkkwpqk4y