Fast Fourier Transform Implementation on FPGA Using Soft-Core Processor NIOS II
English

Poonam S. Isasare, Mahesh T. Kolte
2014 International Journal of Engineering Trends and Technoloy  
FPGAs with soft-core processors offer the opportunity for testing & implementation various trade-offs between hardware and software implementations of the functions to implement. With the Altera NIOS II the processor can be customized through the addition of new instructions. Custom specific functions can be implemented as coprocessors. Altera has provided a C to Hardware compiler that can be used to speed-up some C functions within a C program using hardware acceleration block. While working
more » ... th C2H compiler, we need to write code in C language and then as per our need we can accelerate that block of code over hardware. Design tool automatically integrates that block with NIOSII processor. This methodology saves lot of time required for implementation and validation of the complex design. In this work we present a preliminary performance evaluation of the C2H compiler on FFT algorithm. We compare the compiler results with results with HDL language and calculate the time efficiency. After code transformation, speedups between 6 and 10 have been obtained. For loops with a recurrence, a speedup greater than 2 has been obtained; we show the basic C transformations that provide the best C2H results. In this work we use of the C2H Altera compiler for the automatic VHDL synthesis of FFT algorithm.
doi:10.14445/22315381/ijett-v10p278 fatcat:zulehnxfqfcqllrwnojgmeapvy