A GHz-class charge recovery logic

Visvesh S. Sathe, Marios C. Papaefthymiou, Conrad H. Ziesler
2005 Proceedings of the 2005 international symposium on Low power electronics and design - ISLPED '05  
This paper describes Boost Logic, a logic family which relies on voltage scaling, gate overdrive, and energy recovery, to achieve high energy efficiency at GHz frequencies. The key feature of our design is an energy recovering "boost" stage that provides a high gate overdrive to an aggressively voltage-scaled logic at nearthreshold supply voltage. We have evaluated Boost Logic through post-layout simulation of an 8-bit carry-save multiplier in a ¢ ¡ ¤ £ ¦ ¥ § m CMOS process with © =340mV. At
more » ... ith © =340mV. At 1.6GHz and 1.3V supply voltage, the Boost multiplier dissipates 8.11pJ per computation, yielding 68% energy savings over its pipelined, voltage-scaled static CMOS counterpart. Using low © devices, the Boost Logic multiplier has been verified to operate at 2GHz with a 1.25V voltage supply and 8.50pJ energy dissipation per cycle.
doi:10.1145/1077603.1077627 dblp:conf/islped/SathePZ05 fatcat:soyn5ij32jbx3lt3cfnjrf7zya