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The growing complexity of System-on-Chip (SoC) design calls for an increased usage of transaction-level modeling (TLM), high-level synthesis tools, and reuse of pre-designed components. In the framework of a compositional methodology for efficient SoC design exploration we present three main contributions: a concise library format for characterization and reuse of components specified in high-level languages like SystemC; an algorithm to prune alternative implementations of a component givendoi:10.1109/date.2012.6176550 dblp:conf/date/LiuPC12 fatcat:pj5am7yjpbg6nnvmj5bfp7u3je