Array processors with pipelined optical busses

Z. Guo, R.G. Melhem, R.W. Hall, D.M. Chiarulli, S.P. Levitan
[1990 Proceedings] The Third Symposium on the Frontiers of Massively Parallel Computation  
A synchronous multiprocessor architecture based on pipelined optical bus interconnections is presented. In this architecture the processors are placed in a square grid and are interconnected to one another through horizontal and vertical optical busses. This architecture has an effective diameter as small as 2 due to its orthogonal bus connections, and allows all processors to have simultaneous access to the busses due to its capability for pipelining messages. Although the resulting
more » ... esulting architecture is mesh like and uses bus connections, it has a substantially higher bandwidth than conventional and bus augmented mesh computers. Moreover, it has a simple control structure and is universal in that various well known multiprocessor interconnections can be efficiently embedded in it. This architecture appears to be a good candidate for hybrid opticalelectronic systems in the next generation of parallel computers.
doi:10.1109/fmpc.1990.89479 fatcat:6zfzpd32xrfcpfoe36ux5n7nwy