Memory system architecture for the data centric computing

Ken Takeuchi
2016 Japanese Journal of Applied Physics  
This paper overviews the NAND flash memory and storage class memory such as resistive random access memory (ReRAM), spin-transfer torque magnetoresistive random access memory (STT-MRAM), and parameter random access memory (PRAM) hybrid memory system for the big-data applications. In the conventional processing-centric computing such as personal computers (PCs) and high performance computing (HPC) servers, the data amount was restricted and the key technological issue was to enhance the
more » ... g capabilities by increasing the clock frequency of central processing units (CPUs) and increasing the parallelism with multi/many cores. On the other hand, in the big data applications such as online transaction processing (OLTP) and online analytical processing (OLAP), 3V (volume, variety, and velocity) data must be handled. Thus, the key challenge is to reduce the cost of moving data through the deep memory hierarchy from the storage through the main memory to the CPU and eventually to resolve the Von Neumann bottleneck. To resolve the Von Neumann bottleneck and realize a high-speed, low cost, low power storage, this paper overviews the hybrid memory system especially emphasizing the storage class memory in such a data-centric computing architecture.
doi:10.7567/jjap.55.04ea02 fatcat:wqrsaavh3ja23cxq4oidnolam4