A 12GHz programmable fractional-n frequency divider with 0.18um CMOS technology

Siavash Heydarzadeh, Pooya Torkzadeh, Mohammad Pourmina
2013 2013 5th Computer Science and Electronic Engineering Conference (CEEC)  
In this paper, the design of fractional-n (n: 2, 3, ..., 8) extended True-Single-Phase-Clock (E-TSPC) frequency dividers with 0.18µ CMOS technology and TSMC process is presented. The proposed structure operates up to 12GHz and therefore a 12GHz sinusoidal input voltage applies to produce simulation results. The E-TSPC circuits have a small area occupation, extremely low power consumption (less than 220µW from 1.8V supply voltage) and 50% duty-cycle sinusoidal output voltage. The linear noise
more » ... th 10Hz,100Hz and 1kHz bandwidths) at the output nodes of E-TSPC frequency dividers are calculated and the maximum linear noise of circuits is about 325nV. The new MOSFETs aspect ratio for FF (fast-fast) and SS (slow-slow) corner process are presented and analyzed. The high-swing sinusoidal input voltage and 1pF load capacitance impact on the E-TSPC structure have been investigated and Advanced Design System (ADS) used to produce simulation results.
doi:10.1109/ceec.2013.6659440 fatcat:dvobncns75fuphhu5csj2xmgvm