A copy of this work was available on the public web and has been preserved in the Wayback Machine. The capture dates from 2017; you can also visit the original URL.
The file type is application/pdf
.
Synthesis of folded pipelined architectures for multirate DSP algorithms
1998
IEEE Transactions on Very Large Scale Integration (vlsi) Systems
Exploiting folding technique in configurable DSP architectures design Bit-plane FIR filter Case study: Design of folded Bit-plane FIR filter with changeable folding factor Case study: Design of folded Bit-plane FIR filter with changeable number of coefficients and coefficient length Run-time improvements in folded architectures throughput performances Implementation of Folded H.264/Advanced Video Coding Deblocking Filter Concluding remarks DSP application, demands and technologies The most
doi:10.1109/92.736133
fatcat:zccfmdmrwnde7okdx2zyh2gqmq