Embedded software-based self-test for programmable core-based designs

A. Krstic, Wei-Cheng Lai, Kwang-Ting Cheng, L. Chen, S. Dey
2002 IEEE Design & Test of Computers  
WITH THE GROWING popularity of system-ona-chip (SoC) architectures, demands for short time to market and rich functionality have driven design houses to adopt a new core-based SoC design flow. A core-based SoC incorporates multiple complex, heterogeneous components on a single piece of silicon; these can include digital, analog, mixed-signal, RF, micromechanical, and other kinds of systems. This blurring of the boundaries between different types of devices, together with rapidly increasing
more » ... tional frequencies and shrinking feature sizes, has introduced a whole new set of testing challenges. Not only are high-speed testers costly, but also their performance is increasing more slowly than device speed. Thus, externally testing SoCs translates into increasing yield loss, because guardbanding to cover tester errors results in the loss of increasingly more good chips. Because digital logic testers cannot do precise analog testing, externally testing mixed-Embedded Software-Based Self-Test for Programmable Core-Based Designs Embedded Systems 18 The programmable cores on SoCs can perform on-chip test generation, measurement, response analysis, and even diagnosis. This softwarebased approach to self-testing enables at-speed testing and incurs low DFT overhead.
doi:10.1109/mdt.2002.1018130 fatcat:fyyiaiaoj5dvzf6otfkzjqx25m