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This article deals with performance verification of architecture models of real-time embedded systems. Although realtime scheduling theory provides numerous analytical methods called feasibility tests for scheduling analysis, their use is a complicated task. In order to assist an architecture model designer in early verification, we provide an approach, based on real-time specific design patterns, enabling an automatic schedulability analysis. This analysis is based on existing feasibilitydoi:10.1145/2070337.2070359 dblp:conf/sigada/GaudelSPRDL11 fatcat:bxyqkwsa75dutjlktxjxrrmzby