Algorithmic Design of CMOS LNAs and PAs for 60-GHz Radio

Terry Yao, Michael Q. Gordon, Keith K. W. Tang, Kenneth H. K. Yau, Ming-Ta Yang, Peter Schvan, Sorin P. Voinigescu
2007 IEEE Journal of Solid-State Circuits  
Sixty-gigahertz power (PA) and low-noise (LNA) amplifiers have been implemented, based on algorithmic design methodologies for mm-wave CMOS amplifiers, in a 90-nm RF-CMOS process with thick 9-metal-layer Cu backend and transistor T MAX of 120 GHz/200 GHz. The PA, fabricated for the first time in CMOS at 60 GHz, operates from a 1.5-V supply with 5.2 dB power gain, a 3-dB bandwidth 13 GHz, a P 1dB of +6.4 dBm with 7% PAE and a saturated output power of +9.3 dBm at 60 GHz. The LNA represents the
more » ... rst 90-nm CMOS implementation at 60 GHz and demonstrates improvements in noise, gain and power dissipation compared to earlier 60-GHz LNAs in 160-GHz SiGe HBT and 0.13-m CMOS technologies. It features 14.6 dB gain, an IIP 3 of 6.8 dBm, and a noise figure lower than 5.5 dB, while drawing 16 mA from a 1.5-V supply. The use of spiral inductors for on-chip matching results in highly compact layouts, with the total PA and LNA die areas with pads measuring 0 35 0 43 mm 2 and 0 35 0 40 mm 2 , respectively. Index Terms-Characteristic current densities, CMOS millimeter-wave integrated circuits, MAX , T , inductors, low-noise amplifier (LNA), millimeter-wave, noise figure, power amplifier (PA), receiver, transformers, V-band, 60 GHz.
doi:10.1109/jssc.2007.894325 fatcat:oswksqixvjbdlmvtwbqmipf22q