On the complexity of graph cuboidal dual problems for 3-D floorplanning of integrated circuit design

Renshen Wang, Chung-Kuan Cheng
2009 Proceedings of the 19th ACM Great Lakes symposium on VLSI - GLSVLSI '09  
This paper discusses the impact of migrating from 2-D to 3-D on floorplanning and placement. By looking at a basic formulation of graph cuboidal dual problem, we show that the 3-D case and the 3-layer 2.5-D case are fundamentally more difficult than the 2-D case in terms of computational complexity. By comparison among these cases, the intrinsic complexity in 3-D floorplan structures is revealed in the hard-deciding relations between topological connections and geometrical contacts. The results
more » ... show future challenges for physical design and CAD of 3-D integrated circuits.
doi:10.1145/1531542.1531604 dblp:conf/glvlsi/WangC09a fatcat:6r5yxxiuojgozhr6xi6dhouyku