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Advantageous Sampling of Correlated Current Signals to Supress Fixed-Pattern Noise in CMOS Imagers
2017
Journal of Integrated Circuits and Systems
The Active Pixel Sensor (APS) has been a vastly used integrated circuit topology in CMOS imagers. Mismatch of physical parameters among pixels, caused by process variations, introduces Fixed-Pattern Noise (FPN) at the array output. Correlated Double Sampling (CDS) in voltage mode is a commonly used method to suppress the offset caused FPN. However, it increases the complexity as well as the demanded silicon area of either the pixel or the external circuitry, besides having its signal swing
doi:10.29292/jics.v12i1.450
fatcat:kfulxb35jfa67ieryn34df54se