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Efficient High-Performance ASIC Implementation of JPEG-LS Encoder
2007
2007 Design, Automation & Test in Europe Conference & Exhibition
This paper introduces an innovative design which implements a high-performance JPEG-LS encoder. The encoding process follows the principles of the JPEG-LS lossless mode. The proposed implementation consists of an efficient pipelined JPEG-LS encoder, which operates at a significantly higher encoding rate than any other JPEG-LS hardware or software implementation while keeping area small.
doi:10.1109/date.2007.364584
dblp:conf/date/PapadonikolakisPK07
fatcat:kmu4wojfsbaunlkxnxv3egplzy