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Area-effective FIR filter design for multiplier-less implementation
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.
The hardware complexity of digital filters is not controllable by straightforwardly rounding the coefficients to the quantization levels. In this paper, we propose an effective alternative that distributes a pre-defined addition budget to the multiplier-less FIR filters, which takes into account the common sub-expression sharing inside the computations. We successfully integrate a heuristic common sub-expression elimination (CSE) algorithm and the coefficient quantization by successive
doi:10.1109/iscas.2003.1206222
dblp:conf/iscas/LinYJ03
fatcat:ilufh6yptjbapnscqnczmfjyt4