Parallel time-interleaved analog-to-digital converters (TI-ADCs) are an attractive architecture to realize low-power and high-speed data conversion. As a drawback of such converters, mismatches between the channels impair their performance, e.g., the spurious free dynamic range (SFDR). One characteristic that varies among all channels is the magnitude response. We have recently proposed a method to compensate magnitude response mismatches in two-channel TI-ADCs. In this paper we extend this

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... od to an arbitrary number of channels, discuss a possible implementation, and evaluate its performance. For an M -channel TI-ADC the compensation method requires (M − 1) linear-phase FIR filters with relatively short tap sizes and (M − 1) multipliers to modulate the filter output. Simulations confirm the effectiveness of the proposed method.