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Systems featuring a load-store interface to persistent memory (PM) are expected soon, making in-memory persistent data structures feasible. Ensuring persistent data structure recoverability requires constraints on the order PM writes become persistent. But, current memory systems reorder writes, providing no such guarantees. To complement their upcoming 3D XPoint memory, Intel has announced new instructions to enable programmer control of data persistence. We describe the semantics implied bydoi:10.1109/micro.2016.7783761 dblp:conf/micro/KolliRDSPLCW16 fatcat:qudsk3fy3zh4fljgldiyw5laei