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Three-dimensional global interconnect based on a design window
2011
Chinese Physics B
Based on a stochastic wire length distributed model, the interconnect distribution of a three-dimensional integrated circuit (3D IC) is predicted exactly. Using the results of this model, a global interconnect design window for a giga-scale system-on-chip (SOC) is established by evaluating the constraints of 1) wiring resource, 2) wiring bandwidth, and 3) wiring noise. In comparison to a two-dimensional integrated circuit (2D IC) in a 130-nm and 45-nm technology node, the design window expands
doi:10.1088/1674-1056/20/10/108401
fatcat:nfa32k2pdzcype6gsk4zoxdvv4