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2015 Annual IEEE India Conference (INDICON)
This paper presents a method for designing of low power dissipation, low phase noise and high oscillation frequency based three stage Current Starved VCO (CS-VCO). In this design approach, 3-inverter stages are cascaded to achieve an optimal power dissipation of (7.48508 mW) for fundamental frequency of (3.9955 GHz). The simulation results depict that such VCO has linear voltage-frequency characteristics over a wide tuning range. The circuit performance is validated using 0.18µm CMOSdoi:10.1109/indicon.2015.7443417 fatcat:toblgi25mzee5k346dtrnn3ra4